Specific-domain Hardware Design and Optimization Research Lab
From Algorithm to Silicon
SHaRe Lab develops specialized hardware for intelligent, high-performance, and trustworthy systems while also using artificial intelligence to improve how hardware itself is conceived, designed, verified, and optimized. Our research closes the loop between hardware for聽 intelligence, including AI accelerators, neuromorphic and event-based systems, and intelligence for hardware, where AI supports design-space exploration, architecture generation, verification, optimization, and implementation.聽By connecting these directions, we co-design algorithms, architectures, circuits, and design methods from computational concept to physical realization.
Closing the loop between hardware and intelligence
Six connected research areas support this vision, spanning Physical AI, AI acceleration, AI-assisted hardware design, neuromorphic and emerging-device computing, DSP and communications, and hardware trust.
Physical AI and Event-Based Sensing
Event-driven sensing, near-sensor intelligence, and embedded computing for autonomous systems operating under stringent latency, power, and reliability constraints.
AI Accelerators and Intelligent Computing
FPGA and ASIC architectures for AI workloads with emphasis on hardware-aware algorithm design, efficient dataflow, memory organization, and specialized arithmetic.
AI-Assisted Hardware Design and Optimization
Artificial intelligence for design-space exploration, architecture generation, RTL development, verification, debugging, synthesis, implementation, and closed-loop hardware optimization.
Bio-Inspired Computing
Spiking neural networks, hardware-efficient neuron models, memristive synapses and emerging devices, and scalable digital, analog, and mixed-signal neuromorphic architectures.
Digital Signal Processing Hardware
Hardware-oriented signal processing, finite-precision optimization, spectral and temporal processing, and architectures for high-speed, optical, and embedded communication systems.
Hardware Security and Trusted Systems
PUFs, entropy sources, lightweight cryptography, IC authentication and inspection, hardware-rooted monitoring, and trusted architectures for intelligent systems.
Join SHaRe
We welcome motivated Postdoc fellow, PhD, MASc, and undergraduate researchers interested in specialized hardware, Physical AI, AI accelerators, intelligent design automation, neuromorphic and emerging-device systems, DSP and communications, and trusted hardware.
